摘要
本文主要论述了采用CPLD的设计方法,在数字系统中设计精确测量频率测量仪:在采样时间内同时对标准频率信号和被测频率信号计数,采样完成后,把二者的计数值相比,再乘以标准频率就可以得到被测频率的精确值。采用这种设计方法,系统的软硬件结构简单、开发周期快、测量精度高。
The design of frequency measurer in numeral system is discussed in this paper. It simultaneously takes count of standard frequency signal and frequency signal under discussion in sampling time, and compares with each other after sampling, then multiplies standard frequency for frequency signal needed. The configurations of software and hardware of system are simple, which has a short empolder period and a high meterage precision.
出处
《仪器仪表学报》
EI
CAS
CSCD
北大核心
2006年第z2期1532-1533,1543,共3页
Chinese Journal of Scientific Instrument
