摘要
提出了一种应用于ADSL数据传输的多位电流模Σ-Δ数/模转换器(DAC)。采用多位Σ-Δ调制器,可以在低过采样率和低调制器阶数下设计出高性能的调制器。通过采用动态元素匹配(DEM)技术,降低了由于电流模DAC(SteeringDAC)电路中电流源单元的不匹配带来的噪声,进一步改善了输出信号的信噪比。
A multi-bit Σ-Δ steering current digital-to-analog (DAC) for ADSL application is presented. Based on low over-sampling rate and lower-order multi-bit Σ-Δ modulator, a high-performance modulator is designed. By using dynamic element matching (DEM) technique, the noise induced by static element mismatch in a multi-bit steering current DAC can be reduced, further improving the signal-to-noise ratio of the DAC.
出处
《微电子学》
CAS
CSCD
北大核心
2004年第4期476-478,共3页
Microelectronics
关键词
ADSL
∑-△调制器
数/模转换器
数据传输
Σ-Δ modulator
Digital-to-analog converter
Steering DAC
Data transmission
