摘要
针对某数传系统的抗干扰编码进行了分析和研究,介绍了易于采用超大规模集成电路(VL SI)技术进行软硬件实现的编译码方法,并提出了可将保密性和抗干扰能力有机结合的改进措施,在各种数据链中具有普遍指导意义。最后给出了编译码器的FPGA实现方案及仿真结果,可适应更高速率的宽带无线接入网的使用要求。
The anti-jamming code used in a data communication system is analyzed, then software and hardware realization methods based on the Very Large Scale Integration (VLSI) technology are put forward. Furthermore, several improvements that can greatly improve its communication security and anti-jamming performance are proposed, and these ideas also have universal design guidance in all kinds of datalink. Finally its FPGA-based realization and simulation results of the decoder are introduced, which can be adapted to higher data rate requirements in wide-band wireless networks.
出处
《电讯技术》
北大核心
2004年第5期57-61,共5页
Telecommunication Engineering
基金
武器装备预研基金资助项目(51473090104JB3201)
