Design and Fabrication of Schottky Diode with Standard CMOS Process 被引量：1

标准CMOS工艺集成肖特基二极管设计与实现(英文)

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摘要 Design and fabrication of Schottky barrier diodes (SBD) with a commercial standard 0 35μm CMOS process are described.In order to reduce the series resistor of Schottky contact,interdigitating the fingers of schottky diode layout is adopted.The I-V,C-V ,and S parameter are measured.The parameters of realized SBD such as the saturation current,breakdown voltage,and the Schottky barrier height are given.The SPICE simulation model of the realized SBDs is given. 提出了一种在标准CMOS工艺上集成肖特基二极管的方法 ,并通过MPW在charted 0 35 μm工艺中实现 .为了减小串连电阻 ,肖特基的版图采用了交织方法 .对所设计的肖特基二极管进行了实测得到I V ,C V和S参数 ,并计算得出所测试肖特基二极管的饱和电流、势垒电压及反向击穿电压 .最后给出了可用于SPICE仿真的模型 .

作者李强王俊宇韩益锋闵昊

机构地区复旦大学专用集成电路与系统国家重点实验室

出处《Journal of Semiconductors》 EI CAS CSCD 北大核心 2005年第2期238-242,共5页 半导体学报（英文版）

基金国家高技术研究发展计划资助项目 (批准号 :2 0 0 3AA1Z12 80)~~

关键词 CMOS Schottky diode INTEGRATION CMOS 肖特基二极管集成

分类号 TN311.7 [电子电信—物理电子学]

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参考文献9

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