摘要
依据信号处理任务的特点，结合流水线处理和并行处理，采用模块化设计方法，设计实现了一个由１个８０８６微处理器和１３个高速数字信号处理器ＴＭＳ３２０Ｃ２５构成的多处理器系统。该系统采用双端口ＳＲＡＭ、ＦＩＦＯ进行互连网络的设计，系统的峰值运算能力为每秒２．６亿次以上的整数操作。该系统能够实时实现信号的空间处理和时间处理等，并作为小型声纳系统的信号处理机已经得到应用，并取得良好的结果。
In the absence of detailed technical information available in the open literature concering high -speed processing of sonar signals, we in China have to study the structure of such a signal processing system. We now present our design, whose computing speed reaches over 260 million integer operations per second.The schematic of our design is shown in Fig.1.PU0, a 8086 microprocessor, forms the system management unit. Each of PU1,PU2,...,PU13 is a high speed signal processor TMS320C25, and together they form the system's signal processing unit.The interconnection network between the management unit and the signal processing unit is shown in Fig.2.DR represents dynamic RAM and MR represents multi -port SRAM.The interconnection network among the 13 signal processors is shown in Fig. 3. Fig. 4 shows satisfactory real -time processing results.Finally our design has been successfully applied to actual high -speed processing of sonar signals.
出处
《西北工业大学学报》
EI
CAS
CSCD
北大核心
1996年第4期554-557,共4页
Journal of Northwestern Polytechnical University
