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基于CPLD的CMOS图像传感器的驱动电路设计 被引量:3

Design of Driving Circuit for CMOS Camera Based on CPLD Technology
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摘要 在分析CYPRESS公司的IBIS5-A-1300-CMOS驱动时序的基础上,设计了多斜率积分的驱动时序发生器。选用复杂可编程器件(CPLD)作为硬件设计载体,使用VHDL语言对驱动时序发生器进行了硬件描述。采用QuartusⅡ5.0软件对所做的设计进行了功能仿真,针对ALTERA公司的CPLD器件MAXⅡEPM570T144C3进行适配。系统测试结果表明,所设计的驱动时序发生器满足CMOS相机驱动要求,而且在同步快门下还能调节积分时间。 Driving schedules of IBIS5-A-1300 (CMOS produced by CYPRESS Co. Ltd) have been examined in detail. The driving schedule generator with multiple slope integration has been designed for CMOS camera. Complex program logic device (CPLD)has been chosen as the hardware design platform, driving schedule generator has been described with VHDL. The function simulation of the system is successfully fulfilled with Quartus Ⅱ5.0 software and filled into MAX Ⅱ EPM570T144C3 (a kind of CPLD products that made by ALTERA). Experiments show that designed generator is suitable for the driving of CMOS camera, and the integration time could be adjusted according to different application in the snapshot shutter.
出处 《科学技术与工程》 2007年第10期2354-2357,共4页 Science Technology and Engineering
关键词 CMOS相机 复杂可编程逻辑器件CPLD驱动时序发生器 多斜率积分 CMOS camera complex programmable logic device driving schedule generator multiple slope integration
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共引文献50

同被引文献16

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