摘要
本文探讨了一种新的CMOS三值逻辑系统,建立了一套完备的CMOS三值逻辑基本单元电路。给出了CMOS三进制乘法器及9进制7段字形译码器的设计方案。并分析、讨论了该系统的特点。
A new CMOS three--valued logic system is discussed. Some CMOS three-valued logic unit circuits are designed. The design of CMOS ternary multi-plier and 9--carry corry code to 7-segment decoder is presented.
关键词
CMOS
三值逻辑
单元电路
乘法器
three-valued logic
unit circuit
ternary multiplier
9-carry code to 7-segment decoder
