摘要
介绍了一种16位绝对式矩阵编码器信号采集与处理的设计。为提高编码器信号的处理速度以及系统的可靠性,以现场可编程门阵列(FPGA)代替传统的单片机为控制核心,采用VHDL硬件描述语言进行设计,FPGA实现AD控制,精、粗码处理,以及精粗校正组合等功能,最终输出二进制形式的角位移信息。实践证明,该设计运行稳定,可靠性高,处理时间小于10μs。
A design of signal collection and processing for 16 bits absolute matrix encoder is presented. To enhance the speed of signal processing and improve the reliability of the system, field-programmable gate array（ FPGA） is used as the control core instead of single chip micro-computer（SCM）. The design based on VHSIC hardware description language（VHDL） and FPGA achieves functions such as the control of AD, the processing, emendation and combination of thick code thick code and precise code, emendation and combination. Experimental resuits prove that the design works steady and has high reliability. The processing time is less than 10 μs.
出处
《测控技术》
CSCD
北大核心
2009年第9期17-19,22,共4页
Measurement & Control Technology
