期刊文献+

数字下变频的设计及其在FPGA中的实现 被引量:3

Design of Digital Down Converter and Its Implement Based on FPGA
在线阅读 下载PDF
导出
摘要 分析数字下变频结构及其实现方法,重点研究如何基于FPGA实现数字下变频的功能,并通过仿真分析验证该实现方法的正确性。结果表明,该实现方法可用于各类数字通信系统中频信号的数字下变频处理,具有一定的实用价值。 The configuration of digital down converter and its implement method are analysed,and how to realize digital down converter' function based on FPGA in stress is studied,the correctness of the method is validated by simulation. The resuits indicate that the method can be used in many kinds of intermediate frequency digital down converter processing, thus it has definite practicality value.
机构地区 空军工程大学
出处 《现代电子技术》 2010年第1期55-57,共3页 Modern Electronics Technique
关键词 数字下变频 混频器 数字滤波器 FPGA digital down conversion mixer digital filter FPGA
  • 相关文献

参考文献4

二级参考文献9

共引文献10

同被引文献28

  • 1项英,朱人杰,GinoTuccari,张秀忠,舒逢春.宽带数字单边带下变频器[J].电子学报,2006,34(11):1978-1980. 被引量:8
  • 2杨宏宇,姜鲁鹏,惠彬.基于FPGA的多通道数字信号下变频器设计[J].中国民航学院学报,2006,24(6):1-5. 被引量:4
  • 3胡跃,张正鸿.基于FPGA的数字正交混频变换算法的实现[J].国外电子测量技术,2007,26(5):9-11. 被引量:2
  • 4吴芝路,贾长辉,任广辉.数字下变频器的原理与实现方法[J].哈尔滨商业大学学报(自然科学版),2007,23(3):343-345. 被引量:2
  • 5CHEN M, QUAN H D, ZHAO H,et al. Design of high-speed DDC based multi-stage [C]. 2010 First International Coference on Pervasive Computing, Signal Processing and Applications, Harbin, 2010.. 936-939.
  • 6CONSTANTINIDES George A, CHEUNG Peter Y K, LUK W. Optimum wordlength allocation [C]// 10th An- nual IEEE Symposium on Field-Programmable Custom Computing Machines. [S. 1.]. IEEE, 2002:219-228.
  • 7LEE Dong U, GAFFER Altaf Abdul, CHEUNG Ray C C, et al. Accuracy-guaranteed bit-width optimization [J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2006, 25(10): 1990- 2000.
  • 8CONSTANTINIDES G A, WOEGINGER G J. The com- plexity of multiple wordlength assignment [J]. Applied Mathematics Letters, 2002, 15(2): 137-140.
  • 9KINSMAN Adam B, NICOLICI Nicola. Bit-width alloca- tion for hardware accelerators for scientific computing using SAT-Modulo theory [J]. IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems, 2010, 29 (3) : 405-413.
  • 10CARRERAS Carlos, LOPEZ Juan A, NIETO-TALADRIZ Octavio. Bit-width selection for data-path implementations [C]// Proceedings of the 12th International Symposium on System Synthesis. [S.1.]: [s.n.], 1999: 114-119.

引证文献3

二级引证文献13

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部