摘要
在基于环网的多 DSP系统上 ,应用并行块处理的策略讨论了并行算法设计的调度模型 ;对可 10 0 %利用的 DSP数目及调度模型的 2个关键参数 :块处理的时间和 DSP间的延迟时间进行了具体的分析 ;将 DSP上的处理过程和 I/ O设备上的处理过程分开 ,得到了更加接近真实计算环境的调度模型 ;给出了算法的性能评价准则 ;对FIR滤波器的并行算法进行了具体的设计和实现 .在模拟环境下的测试结果表明 ,应用以上确定调度模型的关键参数的方法 ,FIR滤波器的并行算法的加速比和效率较高 ,与理论分析的结果吻合 .
In the multi DSP system based on the ring network, a scheduling model of designing parallel algorithms is discussed using parallel block processing. The optimistic number of DSP's and two key parameters of the scheduling model, the delay time and the time of processing one block of data, are analyzed. And the scheduling model closer to real computation environments is obtained by dividing the processing procedures into two parts, the processing procedures in the DSP and in the I/O device. The principle of performance measure of algorithms is given. The implementation procedure and result for the FIR filter algorithm are illustrated. The result of simulation experiment shows that the speedup ratio and efficiency of the parallel algorithm for the FIR filter are high and they are in accord with the theoretical analysis.
出处
《计算机研究与发展》
EI
CSCD
北大核心
2000年第7期807-812,共6页
Journal of Computer Research and Development
基金
"九五"国防科技预研项目资助
关键词
多DSP系统
环网
并行算法
设计
multi-DSP system, ring network, parallel block processing, FIR filter
