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8位RISC微处理器核的参数化设计 被引量:4

A Parameterized Design for 8-Bit RISC Microprocessor Core
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摘要 文章分析了精简指令集的结构特征和嵌入式系统的应用需求,在设计出的8位RISC微处理器核的基础上,从指令集、存储空间等体系结构方面做了参数化设计和参数提取,讨论了硬件描述语言和运行于微处理器核上的程序对参数化设计的支持。参数化的设计方法增强了IP核的灵活性和可重用性,可以在大批量设计片上系统的过程中充分使用参数化设计方法。 According to the instruction execution characteristics of Reduced Instructions Set and the application requirement of embedded systems,we presented a parameterized 8- bit RISC microprocessor core,in which parameters are defined and abstracted in the architecture aspects of instructions set,memory space,etc. Then this paper presents the support to parameterized design by HDL and the program running on the processor core. The parameterization methodology enhances IP cores' flexibility and reusability,suitable for applying into the process of batch designs of System- On- a- Chip ICs.
机构地区 合肥工业大学
出处 《微电子学与计算机》 CSCD 北大核心 2002年第1期23-26,共4页 Microelectronics & Computer
基金 国家自然科学基金资助项目(69876010) 高等学校博士学科点专项科研基金(98035901)
关键词 微处理器核 体系结构 精简指令集计算机 RISC 参数化设计 Microprocessor core, Parameterized, Architecture, Paging, RISC
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参考文献4

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同被引文献16

  • 1徐晨,袁红林,李智.基于C*Core的SoC设计与验证[J].微电子学与计算机,2004,21(7):124-126. 被引量:5
  • 2李逍波,潘松,徐旭.新型RISC流水线架构的8位微控制器[J].电子产品世界,2003,10(09A):48-50. 被引量:2
  • 3陆希玉,唐昆,崔慧娟.基于嵌入式系统的低功耗设计[J].微计算机信息,2005,21(07Z):4-5. 被引量:14
  • 4徐晨,袁红林.基于VerilogHDL的IP核参数化设计[J].微电子学与计算机,2005,22(12):85-88. 被引量:3
  • 5陈瑞森,郭东辉.基于CISC/RISC混合架构的嵌入式MCU设计[J].计算机应用研究,2006,23(8):194-196. 被引量:5
  • 6[4]Alex Panato,Sandro Silva,Flávio Wagner,et al.Design of Very Deep Pipelined Multipliers for FPGAs[A].Proceedings of the Design,Automation and Test in Europe Conference and Exhibition Designers' Forum (DATE'04)[C].2004:52-57.
  • 7[5]ZHAO Junchao,CHEN Weiliang,WEI Shaojun.Parameterized IP Core Design[A].4th International Conference On ASIC PROCEEDINGS[C].Shanghai,China,2001.744-747.
  • 8F Vermeulen, F Catthoor, D Verkest. Extended Design Reuse Trade offs in Hardware Software Architecture Mappling [A]. Hardware/Software Codesign, Proceedings of the Eighth International Workshop on [C]. San Diego, California, 2000: 103~107.
  • 9Daniel D Gajski, Allen C H, Viraphol Chaiyakul, et al.Essential Issues for IP Reuse [A]. Asia and South Pacific Design Automation Conference. Yokohama, 2000: 37~42.
  • 10Tony D Givargis, Frank Vahid. Parameterized System Design[A]. Hardware/Software Codesign, Proceedings of the Eighth International Workshop on [C]. San Diego, California, 2000: 98~102.

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