摘要
随着超声相控阵技术的发展,其系统往往不仅支持的可同时工作的通道数量越来越多,而且回波数字化频率也越来越高,这将使得超声相控阵检测系统在运行中产生需要实时处理与实时传输的海量回波数据,给系统的数字接收波束形成器设计带来了挑战。为此,设计并实现一种基于多硬件处理核心的两级结构的数字波束形成器:一方面,波束形成器的硬件处理核心采用多个现场可编程逻辑门阵列(Field programmable gate array,FPGA)来实现多通道海量的回波数据处理,并且硬件处理核心间通过专用机制保证可靠地同步;另一方面,引入高速串行总线来保证多硬件处理核心间的高速海量回波数据的实时传输。结果表明该设计能够满足64通道、200 MSPS数字化频率下的实时数字波束形成实现。
As ultrasonic phased array technology develops,the number of supported channels in the system increases and the echo digitalization frequency gets higher. The massive data to be processed and transmitted in real time brought by the large number of supported channels and the high frequency of echo digitizer during inspection raise challenges in the digital beamformer design in ultrasonic phased array system. Therefore,a multi-core hardware based two-stage digital beamformer of using FPGA was designed and implemeted to process massive data in real time. System accuracy would be ensured by introducing the system synchronization mechanism. Also,high-speed serial bus was adopted for the transmission of massive data in real time. Test shows that the design can run at the condition of 64 channels and 200 MSPS digitalization frequency.
出处
《机械工程学报》
EI
CAS
CSCD
北大核心
2016年第2期70-75,共6页
Journal of Mechanical Engineering
基金
国家自然科学基金资助项目(11374324
11174321)
关键词
波束形成
海量数据
两级结构
高速串行总线
beamforming
massive data
two-stage architecture
high-speed serial bus
