摘要
针对多级放电间隙与压敏电阻组合使用方法的问题,根据压敏电阻的结构和电气特性与多级放电间隙的结构理论,得出通过不同方式的组合试验。整个器件起主要作用的是多级放电间隙。当多级放电间隙两端的电压达到直流放电电压时,多级放电间隙迅速导通,使整个组合器件两端电压迅速减小;当冲击电压小于7kV冲击电压时,压敏电阻并联多级放电间隙的个数,对导通时间有一定的影响;随着冲击电压的升高残压越大,通流呈线性增加。在多级放电间隙和压敏电阻的不同组合方式下,随着脉冲电压的增大,多级放电间隙越少,器件的残压越高。延长SPD的使用寿命。本试验在多级放电间隙与压敏电阻的组合使用方法的分析有一定的参考价值。
In view of combination method for multistage discharge gap and piezoresistance, according to the structure and electrical characteristics of piezoresistance with structure theory of multistage discharge gap, different ways of combination test are obtained. The multistage discharge gap plays a major role for the whole devices. When the voltage across the multistage discharge gap achieves DC discharge voltage, the multistage discharge gap rapidly conducts, the composite device voltage across the whole devices decreases rapidly. When the impulse voltage is less than 7 kV of impulse voltage, the number of piezoresistance paralleling multistage discharge gap has some influence on conduction time. With the increase of voltage impact the residual pressure increases, the flow increases linearly. Under the different combination modes of multilevel discharge gap and piezoresistance, with the increase of pulse voltage, the less the multistage discharge gap is, the higher the residual voltage of the device is. The service life of SPD is prolonged. This experiment has certain reference value in analysis of combination method of multistage discharge gap and piezoresistance.
出处
《现代工业经济和信息化》
2017年第7期43-45,共3页
Modern Industrial Economy and Informationization
关键词
多级放电间隙
压敏电阻
通流
残压
multi-level discharge gap
piezoresistance
conduction
residual pressure
