摘要
提出了一种改进的宽分频比范围可编程分频器,支持对分频数和占空比的编程设置。该结构由改进的可编程下行异步计数器和脉冲二分频器组成,采用置数自释放结构和"时间裕度借用"方法,将关键路径延时容忍度增大了一个时钟周期。提出的分频器采用0.13μm CMOS工艺进行设计与流片,版图尺寸为38.5μm×66.2μm。流片后的测试结果表明,该分频器的分频比范围为2~1 022,在分频比为m的条件下,占空比可从1/m调节至(m-1)/m。在全分频范围内,工作速度可达1.85GHz,功耗小于0.82mW。
An improved programmable frequency divider with wide division ratio range was proposed.The division ratio and duty cycle of the divider could be configured.The divider consisted of an improved asynchronous down counter and a pulse/2 divider.The key path delay tolerance was increased by a clock period when adopting the home number ＂self-release＂structure and ＂time margin borrowing＂technique.The proposed divider was implemented and taped-out in a 0.13μm CMOS process.The layout area was 38.5μm×66.2μm.The test results from the taped-out chips showed that the divider was capable of operating in the division ratio between 2 and 1 022,and the duty cycle range was 1/mto（m-1）/m where m was the division ratio.The operating frequency was up to 1.85 GHz over the whole division ratio range with a power consumption less than 0.82 mW.
作者
韦援丰
杨海钢
陈柱佳
WEI Yuanfeng YANG Haigang CHEN Zhujia(Institute of Electronics, Chinese Academy of Sciences, Beijing 100190, P. R. China University of Chinese Academy of Sciences, Beijing 100049, P. R. China)
出处
《微电子学》
CSCD
北大核心
2017年第5期674-678,684,共6页
Microelectronics
基金
国家自然科学基金资助项目(61474120)
关键词
可编程分频器
占空比设置
自释放
时间裕量借用
Programmable frequency divider
Configurable duty cycle
Self-release
Time margin borrowing
