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合并单元测试仪同步功能的设计与应用

Design and Application of a Merging Unit Tester
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摘要 结合智能变电站对合并单元测试仪时间同步方式和精度的要求,提出了一种多时钟源的时钟同步设计方案。该方案中时钟源可以从GPS/北斗、内部时钟、外部秒脉冲、外部IRIG_B(DC)码任选一种,输出多种形式的高精度IRIG_B(DC)和秒脉冲信号。介绍合并单元测试仪的整体功能、同步功能的硬件设计和软件设计、该同步功能的应用。具备该同步功能的测试仪可以满足智能变电站中二次设备的同步检测,确保其安全可靠运行。 Based on the requirement of time synchronization method and precision of integrated unit tester for intelligent substation, a clock synchronization design scheme is proposed. In this scheme, the clock source can be chosen from GPS/Beidou, internal clock, external second pulse and external IRIG_B(DC) code to output various forms of high-precision IRIG_B(DC) and second pulse signals.Firstly, the whole function of the combined unit tester is introduced. Then the hardware and software design of the synchronization function are introduced. Finally, the application of the synchronization function is introduced. The test instrument with the synchronization function can satisfy the synchronization detection of the secondary equipment in the intelligent substation to ensure its safe and reliable operation.
作者 吕念芝 LV Nianzhi(School of Electrical Engineering,Fuzhou Institute of Technology,Fuzhou,Fujian 350001)
出处 《武夷学院学报》 2019年第9期52-57,共6页 Journal of Wuyi University
基金 基于FPGA的时间同步装置的设计与研究(Kfkt2019002)
关键词 合并单元测试仪 FPGA IRIG_B(DC码) 同步 秒脉冲 merging unit tester FPGA IRIG_B(DC) synchronization second pulse
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