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交叉型实时QC-LDPC码的设计与FPGA实现 被引量:3

Design and FPGA implementation of cross-type real-time QC-LDPC codes
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摘要 为了解决编码效率和码率灵活问题,以便更易于硬件实现,提出了一种交叉型准循环低密度奇偶校验(QC-LDPC)码构造及其打孔算法。首先采用交叉对角线矩阵来构建校验矩阵,以便实现线性时间编码,减少编码的复杂度。其次,通过匹配交叉对角线结构的方式进行打孔,得到任意变化的码率以及比特均匀分布效果。最后,结合硬件平台仿真进行了QC-LDPC编码器FPGA实现。性能仿真结果表明,基于交叉对角线结构的QC-LDPC编码器有效提高了编码的实时性、降低实现复杂度。 In order to solve the problems of coding efficiency and bit rate flexibility and make it easier to implement in hardware,a cross-quasi-cyclic low-density parity-check codes(QC-LDPC)code construction and Hole algorithm.First,a cross-diagonal matrix is used to construct the check matrix,so as to realize linear time coding and reduce coding complexity.Secondly,puncturing is carried out by matching the cross-diagonal structure to obtain an arbitrarily changing code rate and uniform bit distribution effect.Finally,the FPGA implementation of QC-LDPC encoder was carried out in combination with the hardware platform simulation.The performance simulation results show that the QC-LDPC encoder based on the cross-diagonal structure effectively improves the real-time encoding and reduces the implementation complexity.
作者 黄留群 Huang Liuqun(School of Computer and Information,Hohai University,Nanjing 210000,China)
出处 《电子测量技术》 2020年第14期177-181,共5页 Electronic Measurement Technology
关键词 低密度奇偶校验码 准循环 FPGA 编码器 编码效率 low-density parity check code quasi-cyclic FPGA encoder coding efficiency
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