摘要
RSA是目前业界最成熟且应用最广泛的非对称加密算法。由于传统RSA加密算法缺乏抗侧信道攻击的结构,极易受到功耗分析等侧信道分析技术的攻击。因此,提出一种抗功耗攻击的RSA协处理器,通过选择指数随机化掩盖和添加伪操作的方法,可有效防御简单功耗分析和差分功耗分析攻击;结合CSA加法器和2层Karatsuba乘法器实现的基256免减Montgomery模乘器,可在不消耗过多面积的前提下有效提升RSA算法的运算速度。实验结果表明:本处理器能够在ASIC和FPGA上实现RSA加解密功能。基于SMIC 130 nm工艺,在100 MHz时钟频率下进行DC综合,结果表明:1024位抗功耗攻击的RSA协处理器吞吐率可达到110 kbit/s,面积约为310 k门。
RSA algorithm is the most mature and widely used asymmetric encryption algorithm in the industry.Because the traditional RSA encryption algorithm lacks the structure of resisting side channel attack,it is vulnerable to the attack of side channel analysis technology such as power analysis.An RSA coprocessor is proposed to resist power consumption attacks.It can effectively defend against simple power consumption analysis and differential power consumption analysis attacks by selecting the method of exponential randomization masking and adding pseudo-operation.Combining the CSA adder and the two-layer Karatsuba multiplier,the base 256 without subtraction Montgomery modulus multiplier can effectively improve the speed of RSA algorithm without consuming too much area.The experimental results show that the processor can realize RSA encryption and decryption on ASIC and FPGA.Based on SMIC 130 nm process and DC synthesis at 100 MHz clock frequency,the results show that the throughput rate of 1024 bit anti-power attack RSA coprocessor can reach 110 kbit/s with an area of about 310 k gates.
作者
蔡梓文
崔超
肖勇
赵云
林伟斌
CAI Ziwen;CUI Chao;XIAO Yong;ZHAO Yun;LIN Weibin(Electric Power Research Institute of China Southern Power Grid,Guangzhou Guangdong 510663,China)
出处
《电子器件》
CAS
北大核心
2021年第4期876-881,共6页
Chinese Journal of Electron Devices
基金
自主高安全计量用电安全芯片关键技术研究项目(ZBKJXM20180014/SEPRI-K185011)。
