摘要
围绕时序逻辑电路设计中串行数据检测器这一教学案例进行探讨,本文分析了传统和两种改进型电路的设计缺陷及其逻辑抽象本质,通过将传统设计方法和实用的电路设计相结合,能够把时序逻辑电路设计中涉及的逻辑抽象、状态等价、状态化简等概念实例化,教学内容的理论体系更完整、教学过程的逻辑性更强,有助于激发同学们夯实理论知识体系、解决实际问题的创新性思维能力。
A teaching case of serial data detector is discussed in sequential logic circuit design.Some design defects of traditional and two improved circuits and their logical abstractions are analyzed. By combining traditional design methods with practical circuit design, the concepts of logical abstraction, state equivalence, and state simplification involved in the design of sequential logic circuits are instantiated. The theoretical system of teaching content is more complete, and the logic of the teaching process is stronger, which will help motivate students to consolidate the theoretical knowledge system and improve innovative thinking ability to solve practical problems.
作者
余安喜
罗笑冰
李德鑫
杜湘瑜
YU Anxi;LUO Xiaobing;LI Dexin;DU Xiangyu(College of Electronic Science and Technology,National University of Defense Technology,Changsha 410073,China)
出处
《电气电子教学学报》
2022年第1期10-12,共3页
Journal of Electrical and Electronic Education
基金
2019校级教学成果立项培养项目(U2019014)
2020校级教改课题(U2020007)。
