摘要
目前,D类全桥谐振变换器主要是通过在开关器件并联固定容值的缓冲电容的结构来实现零电压开关(ZVS),对于利用开关器件自身的寄生电容作为缓冲电容的变换器的分析不全面。高频工作条件下,死区时间设置的过长或者过短,都会造成变换器的高额功率损耗甚至器件的损坏。所以本文通过分析D类全桥变换器的工作过程,确定了不同死区时间下全桥变换器的损耗模式,通过对死区时间的调节来减小变换器的开关损耗。然后,设计一个频率达到兆赫兹的基于碳化硅器件的D类全桥变换器的样机,实验结果验证了通过调节死区时间使其工作在低损耗模式下可以减小开关损耗,提升工作效率。
At present,the class-D full-bridge resonant converter is mainly realized by the structure of the buffer ca-pacitor with a fixed capacitance in parallel with the switching device to achieve zero voltage switching(ZVS),and the analysis of the converter using the parasitic capacitance of the switching device itself as the buffer capacitor is not comprehensive.Under the high frequency working conditions,the dead time setting is too long or too short,which will cause the high power loss of the converter or even the damage of the device.Therefore,by analyzing the working pro-cess of the class-D full-bridge converter,the loss mode of the full-bridge converter under different dead time is deter-mined,and the switching loss of the converter is reduced by adjusting the dead time.Then,a prototype of the class-D full-bridge converter based on silicon carbide devices with a frequency of MHz is designed.The experimental results verify that by adjusting the dead time to make it work in the low loss mode,the switching loss can be reduced and the working efficiency can be improved.
作者
许磊
路富朝
张政权
XU Lei;LU Fu-chao;ZHANG Zheng-quan(Southwest Jiaotong University,School of Physical Science and Technology,Chengdu 610031,China)
出处
《电力电子技术》
2025年第2期103-106,124,共5页
Power Electronics
关键词
全桥变换器
零电压开关
死区时间
full-bridge converter
zero voltage switching
dead time
