期刊文献+

SiO_2-Si_3N_4栅介质膜陷阱特性的高频C-V分析

High Frequency C-V Method Applied to the Characterization of Memory Trap Distribution in SiO_2-Si_3N_4 Dielectric Film
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摘要 采用高频 C-V特性测试技术 ,研究由热氧化生成的超薄 Si O2 膜和低压化学汽相淀积法制备的非均匀结构 Si3N4膜 ,两者组成的栅介质膜的陷阱特性 (包括陷阱密度、能量和空间分布深度等参数 )。结果表明 :在栅复合膜陷阱电荷非稳态释放模型下建立的高频 C-V理论及其分析方法 ,可以很好地表征实验曲线 。 The memory trap characterization, including trap density, trap energy level and trap space profile, is investigated by the measurement of high frequency C-V in our fabricating SiO 2-si 3N 4 dielectric film with the ultra thin oxide film formed by the thermo-oxidation technique and the nitride film of nonuniform structure formed by LPCVD technique. The result indicates that the analytical theory of high frequency C-V based on the nonsteady state model dealing with the release of memory charges in MNOS structure, has satisfactorily described experimental results and the memory trap distribution parameters can be determined from this theory.
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 2003年第2期236-240,共5页 Research & Progress of SSE
基金 国家自然科学基金资助 (项目编号 :692 760 34 )
关键词 金属—氮化硅—二氧化硅—硅结构 存储陷阱分布 高频容—压特性 SiO2—Si3N4栅介质膜 陷阱特性 非挥发性存储器 MNOS structure distribution of memory trap high frequency C-V characteristics
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参考文献11

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