A transient performance optimized CCL-LDO regulator is proposed.In the CCL-LDO,the control method of the charge pump phase-locked loop is adopted.A current control loop has the feedback signal and reference current to...A transient performance optimized CCL-LDO regulator is proposed.In the CCL-LDO,the control method of the charge pump phase-locked loop is adopted.A current control loop has the feedback signal and reference current to be compared,and then a loop filter generates the gate voltage of the power MOSFET by integrating the error current.The CCL-LDO has the optimized damping coefficient and natural resonant frequency, while its output voltage can be sub-l-V and is not restricted by the reference voltage.With a 1μF decoupling capacitor,the experimental results based on a 0.13μm CMOS process show that the output voltage is 1.0 V;when the workload changes from 100μA to 100 mA transiently,the stable dropout is 4.25 mV,the settling time is 8.2μs and the undershoot is 5.11 mV;when the workload changes from 100 mA to 100μA transiently,the stable dropout is 4.25 mV,the settling time is 23.3μs and the overshoot is 6.21 mV.The PSRR value is more than -95 dB.Most of the attributes of the CCL-LDO are improved rapidly with a FOM value of 0.0097.展开更多
基金Project supported by the National New Century Excellent Talents in Universitythe Program for Changjiang Scholars and Innovative Research Team in University of Chinathe National Natural Science Foundation of China(Nos.61076036,60906009)
文摘A transient performance optimized CCL-LDO regulator is proposed.In the CCL-LDO,the control method of the charge pump phase-locked loop is adopted.A current control loop has the feedback signal and reference current to be compared,and then a loop filter generates the gate voltage of the power MOSFET by integrating the error current.The CCL-LDO has the optimized damping coefficient and natural resonant frequency, while its output voltage can be sub-l-V and is not restricted by the reference voltage.With a 1μF decoupling capacitor,the experimental results based on a 0.13μm CMOS process show that the output voltage is 1.0 V;when the workload changes from 100μA to 100 mA transiently,the stable dropout is 4.25 mV,the settling time is 8.2μs and the undershoot is 5.11 mV;when the workload changes from 100 mA to 100μA transiently,the stable dropout is 4.25 mV,the settling time is 23.3μs and the overshoot is 6.21 mV.The PSRR value is more than -95 dB.Most of the attributes of the CCL-LDO are improved rapidly with a FOM value of 0.0097.
