主要针对Global UHF RFID protocols的RFID测试平台,结合虚拟仪器技术和数字信号处理技术,采用CISC半导体公司的测试平台,用来对ISO/IEC 18000-63协议通信链路参数测试.研究了部分通信参数动态变化时激活标签所需功率的变化,并对测试标...主要针对Global UHF RFID protocols的RFID测试平台,结合虚拟仪器技术和数字信号处理技术,采用CISC半导体公司的测试平台,用来对ISO/IEC 18000-63协议通信链路参数测试.研究了部分通信参数动态变化时激活标签所需功率的变化,并对测试标签的灵敏度进行了测试.测试研究表明在基带编码采用较小的Tari值、以及较高的调制深度时,标签所需激活功率最小,系统识别距离最远.展开更多
This paper introduces a high-performance analog front end for a passive UHF RFID transponder IC, which is compatible with the ISO/IEC 18000-6B standard,operating at the 915MHz ISM band with a total supply current cons...This paper introduces a high-performance analog front end for a passive UHF RFID transponder IC, which is compatible with the ISO/IEC 18000-6B standard,operating at the 915MHz ISM band with a total supply current consumption less than 8μA. There are no external components, except for the antenna. The passive IC＇s power supply is taken from the energy of the received RF electromagnetic field with the help of a Schottky diode rectifier. The RFID analog front end includes a local oscillator, clock generator, power on reset circuit, matching network and backscatter,rectifier,regulator, and AM demodulator. The IC, whose reading distance is more than 3m,is fabricated with a Chartered 0.35μm two-poly four-metal CMOS process with Schottky diodes and is EEPROM supported. The core size is 300μm × 720μm.展开更多
This paper introduces a novel verification development platform for the passive UHF RFID tag,which is compatible with the ISO/IEC 18000-6B standard,operating in the 915MHz ISM band. This platform efficiently reduces t...This paper introduces a novel verification development platform for the passive UHF RFID tag,which is compatible with the ISO/IEC 18000-6B standard,operating in the 915MHz ISM band. This platform efficiently reduces the design and development time and cost, and implements a fast prototype design of the passive UHF RFID tag. It includes the RFID analog front end and the tag control logic, which is implemented in an Altera ACEX FPGA. The RFID analog front end, which is fabricated using a Chartered 0.35μm two-poly four-metal CMOS process, contains a local oscillator, power on reset circuit, matching network and backscatter, rectifier, regu- lator,AM demodulator, etc. The platform achieves rapid, flexible and efficient verification and development, and can also be fit for other RFID standards after changing the tag control logic in FPGA.展开更多
文摘主要针对Global UHF RFID protocols的RFID测试平台,结合虚拟仪器技术和数字信号处理技术,采用CISC半导体公司的测试平台,用来对ISO/IEC 18000-63协议通信链路参数测试.研究了部分通信参数动态变化时激活标签所需功率的变化,并对测试标签的灵敏度进行了测试.测试研究表明在基带编码采用较小的Tari值、以及较高的调制深度时,标签所需激活功率最小,系统识别距离最远.
文摘This paper introduces a high-performance analog front end for a passive UHF RFID transponder IC, which is compatible with the ISO/IEC 18000-6B standard,operating at the 915MHz ISM band with a total supply current consumption less than 8μA. There are no external components, except for the antenna. The passive IC＇s power supply is taken from the energy of the received RF electromagnetic field with the help of a Schottky diode rectifier. The RFID analog front end includes a local oscillator, clock generator, power on reset circuit, matching network and backscatter,rectifier,regulator, and AM demodulator. The IC, whose reading distance is more than 3m,is fabricated with a Chartered 0.35μm two-poly four-metal CMOS process with Schottky diodes and is EEPROM supported. The core size is 300μm × 720μm.
文摘This paper introduces a novel verification development platform for the passive UHF RFID tag,which is compatible with the ISO/IEC 18000-6B standard,operating in the 915MHz ISM band. This platform efficiently reduces the design and development time and cost, and implements a fast prototype design of the passive UHF RFID tag. It includes the RFID analog front end and the tag control logic, which is implemented in an Altera ACEX FPGA. The RFID analog front end, which is fabricated using a Chartered 0.35μm two-poly four-metal CMOS process, contains a local oscillator, power on reset circuit, matching network and backscatter, rectifier, regu- lator,AM demodulator, etc. The platform achieves rapid, flexible and efficient verification and development, and can also be fit for other RFID standards after changing the tag control logic in FPGA.
