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Design and application of a depletion-mode NJFET in a high-voltage BiCMOS process
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作者 刘勇 唐昭焕 +3 位作者 王志宽 杨永晖 杨卫东 胡永贵 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2010年第8期70-73,共4页
A novel depletion-mode NJFET compatible high-voltage BiCMOS process is proposed and experimentally demonstrated with a four-branch 12-bit DAC(digital-to-analog converter).With this process,an NJFET with a pinch-off ... A novel depletion-mode NJFET compatible high-voltage BiCMOS process is proposed and experimentally demonstrated with a four-branch 12-bit DAC(digital-to-analog converter).With this process,an NJFET with a pinch-off voltage ofabout-1.5 V and a breakdown voltage of about 16 V,an NLDDMOS(N-type lightly-dosed-drain in MOS) with a turn-on voltage of about 1.0 V and a breakdown voltage of about 35 V,and a Zener diode with a reverse voltage of about 5.6 V were obtained.Measurement results showed that the converter had a reference temperature coefficient of less than±25 ppm/℃,a differential coefficient error of less than±0.3 LSB,and a linear error of less than±0.5 LSB.The depletion-mode NJFET and its compatible process can also be widely used for high-voltage ADCs or DACs. 展开更多
关键词 depletion-mode NJFET high-voltage bicmos process ADC DAC temperature coefficient
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