This work proposes an alternative strategy to the use of a speed sensor in <span style="white-space:normal;font-size:10pt;font-family:;" "="">the implementation of active and reactive po...This work proposes an alternative strategy to the use of a speed sensor in <span style="white-space:normal;font-size:10pt;font-family:;" "="">the implementation of active and reactive power based model reference adaptive system (PQ-MRAS) estimator in order to calculate the rotor and stator resistances of an induction motor (IM) and the use of these parameters for the detection of inter-turn short circuits (ITSC) faults in the stator of this motor. The rotor and stator resistance estimation part of the IM is performed by the PQ-MRAS method in which the rotor angular velocity is reconstructed from the interconnected high gain observer (IHGO). The ITSC fault detection part is done by the derivation of stator resistance estimated by the PQ-</span><span style="white-space:normal;font-size:10pt;font-family:;" "="">MRAS estimator. In addition to the speed sensorless detection of ITSC faults of the IM, an approach to determine the number of shorted turns based on the difference between the phase current of the healthy and faulty machine is proposed. Simulation results obtained from the MATLAB/Simulink platform have shown that the PQ-MRAS estimator using an interconnected high-</span><span style="white-space:normal;font-size:10pt;font-family:;" "="">gain observer gives very similar results to those using the speed sensor. The </span><span style="white-space:normal;font-size:10pt;font-family:;" "="">estimation errors in the cases of speed variation and load torque are al</span><span style="white-space:normal;font-size:10pt;font-family:;" "="">mos</span><span style="white-space:normal;font-size:10pt;font-family:;" "="">t identical. Variations in stator and rotor resistances influence the per</span><span style="white-space:normal;font-size:10pt;font-family:;" "="">formance of the observer and lead to poor estimation of the rotor resistance. The results of ITSC fault detection using IHGO are very similar to the results in the literature using the same diagnostic approach with a speed sensor.</span>展开更多
A monolithic microwave integrated circuit （MMIC） power amplifier （PA） is proposed. It adopts a new on-chip bias circuit, which not only avoids the instability of the direct current bias caused by the change in the...A monolithic microwave integrated circuit （MMIC） power amplifier （PA） is proposed. It adopts a new on-chip bias circuit, which not only avoids the instability of the direct current bias caused by the change in the power supply and temperature, but also compensates deviations caused by the increase in input power. The bias circuit is a current-mirror configuration, and the feedback circuit helps to maintain bias voltage at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit. A shunt capacitor at the base node of the active bias transistor enhances the linearity of the PA. The chip is fabricated in an InGaP/GaAs heterojunction bipolar transistor （HBT） process. Measured results exhibit a 26. 6-dBm output compression point, 33.6% power-added efficiency （PAE） and - 40.2 dBc adjacent channel power ratio （ACPR） for wide-band code division multiple access （W-CDMA） applications.展开更多
Power integration based on 4 H-SiC is a very promising technology for high-frequency and high-temperature power electronics applications. However, the fabrication processes used in Si BiCMOS technology is not applicab...Power integration based on 4 H-SiC is a very promising technology for high-frequency and high-temperature power electronics applications. However, the fabrication processes used in Si BiCMOS technology is not applicable in 4 H-SiC at present, and few studies on the monolithic power integration of the SiC signal devices and power devices have been reported. In this paper, we propose a novel lateral BJT structure, which is suitable for monolithically integrating with the vertical power BJT on the same epitaxial wafer at the cost of one additional mask. The signal BJT’s static and dynamic characteristics are comprehensively investigated by TCAD simulation.Simulation results show that the common-emitter current gains of the 4 H-SiC signal BJT are 133 and 52 at room temperature and 300 ℃, respectively. Its implementation in an inverter shows that its switching time is about200 ns.展开更多
为了增加单位增益频率与压摆率,并能够工作在低电源电压下,同时降低偏置电流,提出了一种改进的基于0.18μm CMOS工艺的AB类放大器,其采用多级放大器结构,第一级为具有电流镜负载的NMOS差分对,第二反相级由共源放大器实现,第三极为AB类...为了增加单位增益频率与压摆率,并能够工作在低电源电压下,同时降低偏置电流,提出了一种改进的基于0.18μm CMOS工艺的AB类放大器,其采用多级放大器结构,第一级为具有电流镜负载的NMOS差分对,第二反相级由共源放大器实现,第三极为AB类放大器,其能够在±500 m V电源下工作.电路仿真结果显示该放大器相位裕度为87°;总补偿电容为5 p F,与传统放大器相比减少了50%;单位增益频率为21.17 MHz,比传统放大器增大约10倍;压摆率为7.5和8.57 V/μs,与传统电路相比,分别增加了2.8倍和2.6倍.此外,与其他文献相比,该放大器具有较大的单位增益带宽和压摆率以及较小的功耗.展开更多
文摘This work proposes an alternative strategy to the use of a speed sensor in <span style="white-space:normal;font-size:10pt;font-family:;" "="">the implementation of active and reactive power based model reference adaptive system (PQ-MRAS) estimator in order to calculate the rotor and stator resistances of an induction motor (IM) and the use of these parameters for the detection of inter-turn short circuits (ITSC) faults in the stator of this motor. The rotor and stator resistance estimation part of the IM is performed by the PQ-MRAS method in which the rotor angular velocity is reconstructed from the interconnected high gain observer (IHGO). The ITSC fault detection part is done by the derivation of stator resistance estimated by the PQ-</span><span style="white-space:normal;font-size:10pt;font-family:;" "="">MRAS estimator. In addition to the speed sensorless detection of ITSC faults of the IM, an approach to determine the number of shorted turns based on the difference between the phase current of the healthy and faulty machine is proposed. Simulation results obtained from the MATLAB/Simulink platform have shown that the PQ-MRAS estimator using an interconnected high-</span><span style="white-space:normal;font-size:10pt;font-family:;" "="">gain observer gives very similar results to those using the speed sensor. The </span><span style="white-space:normal;font-size:10pt;font-family:;" "="">estimation errors in the cases of speed variation and load torque are al</span><span style="white-space:normal;font-size:10pt;font-family:;" "="">mos</span><span style="white-space:normal;font-size:10pt;font-family:;" "="">t identical. Variations in stator and rotor resistances influence the per</span><span style="white-space:normal;font-size:10pt;font-family:;" "="">formance of the observer and lead to poor estimation of the rotor resistance. The results of ITSC fault detection using IHGO are very similar to the results in the literature using the same diagnostic approach with a speed sensor.</span>
基金The National High Technology Research and Development Program of China(863 Program)(No.2009AA01Z260)
文摘A monolithic microwave integrated circuit （MMIC） power amplifier （PA） is proposed. It adopts a new on-chip bias circuit, which not only avoids the instability of the direct current bias caused by the change in the power supply and temperature, but also compensates deviations caused by the increase in input power. The bias circuit is a current-mirror configuration, and the feedback circuit helps to maintain bias voltage at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit. A shunt capacitor at the base node of the active bias transistor enhances the linearity of the PA. The chip is fabricated in an InGaP/GaAs heterojunction bipolar transistor （HBT） process. Measured results exhibit a 26. 6-dBm output compression point, 33.6% power-added efficiency （PAE） and - 40.2 dBc adjacent channel power ratio （ACPR） for wide-band code division multiple access （W-CDMA） applications.
基金Project supported by the National Natural Science Foundation of China(No.51577054)
文摘Power integration based on 4 H-SiC is a very promising technology for high-frequency and high-temperature power electronics applications. However, the fabrication processes used in Si BiCMOS technology is not applicable in 4 H-SiC at present, and few studies on the monolithic power integration of the SiC signal devices and power devices have been reported. In this paper, we propose a novel lateral BJT structure, which is suitable for monolithically integrating with the vertical power BJT on the same epitaxial wafer at the cost of one additional mask. The signal BJT’s static and dynamic characteristics are comprehensively investigated by TCAD simulation.Simulation results show that the common-emitter current gains of the 4 H-SiC signal BJT are 133 and 52 at room temperature and 300 ℃, respectively. Its implementation in an inverter shows that its switching time is about200 ns.
文摘为了增加单位增益频率与压摆率,并能够工作在低电源电压下,同时降低偏置电流,提出了一种改进的基于0.18μm CMOS工艺的AB类放大器,其采用多级放大器结构,第一级为具有电流镜负载的NMOS差分对,第二反相级由共源放大器实现,第三极为AB类放大器,其能够在±500 m V电源下工作.电路仿真结果显示该放大器相位裕度为87°;总补偿电容为5 p F,与传统放大器相比减少了50%;单位增益频率为21.17 MHz,比传统放大器增大约10倍;压摆率为7.5和8.57 V/μs,与传统电路相比,分别增加了2.8倍和2.6倍.此外,与其他文献相比,该放大器具有较大的单位增益带宽和压摆率以及较小的功耗.
文摘为了减小低电源电压以及短沟道效应对放大器的影响,获得低电压高增益的放大器,提出了一种基于65 nm CMOS工艺技术的全差分运算跨导放大器(OTA).采用基于增益增强技术的折叠共源共栅拓扑结构,使放大器具有轨到轨输入及大输出摆幅特性,同时兼备高速、高增益及低功耗优点.电路仿真结果表明,其直流增益为82 d B,增益带宽为477 MHz,相位裕度为59°.正常工艺角下稳定时间为10 ns,稳定精度为0.05%,而功耗仅为4.8 m W.
