MIMO-DFE(Multiple-Input-Multiple-Output Decision Feedback Equalizer) based receiver architectures are researched recently to detect signals in BLAST(Bell laboratories LAyered Space-Time) over frequency-selective chann...MIMO-DFE(Multiple-Input-Multiple-Output Decision Feedback Equalizer) based receiver architectures are researched recently to detect signals in BLAST(Bell laboratories LAyered Space-Time) over frequency-selective channels. Due to their recursive structure, these receivers may suffer from error propagation which results in an overall mean square error degradation. An MIMO-DFE based BLAST receiver with limited error propagation to combat frequencyselective channel is proposed, which employs both norm constraint on feedback filter taps and soft decision device. Simulation results show that the proposed receiver outperforms conventional ones in various frequency selective channels.展开更多
This paper evaluates the effect of decision feedback equalizer( DFE) error propagation for400 Gb/s Ethernet( 400 GbE) electrical link in order to propose some effective methods to improve bit error rate( BER). First,a...This paper evaluates the effect of decision feedback equalizer( DFE) error propagation for400 Gb/s Ethernet( 400 GbE) electrical link in order to propose some effective methods to improve bit error rate( BER). First,an analytical model for DFE burst error length distribution is proposed and simulated based on a NRZ electrical link in which a 5-tap DFE combined with a multiple-tap feed forward equalizer( FFE) is included. Then,a detailed derivation for BER considering DFE error propagation is given based on the distribution of burst error run length and the BER performance with and without forward error correction( FEC) is simulated too. After that,this paper investigates several MUX-based FEC interleaving methods including their complexity and latency in order to improve BER further. At last,three FEC interleaving schemes are compared not only in interleaving gain,but also in hardware complexities and latencies. Simulation results show that pre-interleave bit muxing can obtain good tradeoff between BER and complexity for 400 Gb E electrical link.展开更多
We propose a trellis-compressed maximum likelihood sequence estimation(TC-MLSE)-assisted sliding-block decision feedback equalizer(DFE)to suppress the error propagation resulting from the DFE in high-speed systems.We ...We propose a trellis-compressed maximum likelihood sequence estimation(TC-MLSE)-assisted sliding-block decision feedback equalizer(DFE)to suppress the error propagation resulting from the DFE in high-speed systems.We use an out-ofrange detector to detect the end of burst errors from the DFE and activate the optional TC-MLSE to correct burst errors.We conduct experiments to transmit a 201-Gbit/s PAM-8 signal.The results show that the proposed method achieves a bit error rate of 3.65×10^(-3),which is close to that of MLSE.The optional MLSE is only activated when needed and processes 11.4%of the total symbols.Moreover,the proposed method compresses the maximum length of burst errors from 19 to 5.展开更多
A 6.25 Gbps SerDes core used in the high signed based on the OIF-CEI-02.0 standard. To speed backplane communication receiver has been decounteract the serious Inter-Syrmbol-Interference （ISI）, the core employed a h...A 6.25 Gbps SerDes core used in the high signed based on the OIF-CEI-02.0 standard. To speed backplane communication receiver has been decounteract the serious Inter-Syrmbol-Interference （ISI）, the core employed a half-rate four-tap decision feedback equalizer （DFE）. The equalizer used the Signsign least mean-squared （SS-LMS） algorithm to realize the coefficient adaptation. An automatic gain control （AGC） amplifier with the sign least mean-squared （S-LMS） algorithm has been used to compensate the transmission media loss. To recover the clock signal from the input data serial and provide for the DFE and AGC, a bang-bang clock recovery （BB-CR） is adopted. A third order phase loop loek （PLL） model was proposed to predict characteristics of the BB-CR. The core has been verified by behavioral modeling in MATLAB. The results indicate that the core can meet the specifications of the backplane receiver. The DFE recovered data over a 34＂ FR-4 backplane has a peak-to-peak jitter of 17 ps, a horizontal eye opening of 0.87 UI, and a vertical eye opening of 500 mVpp.展开更多
We propose a multi-tap look-up-table(LUT)-based error-tracking decision feedback equalizer with partial unrolling(ET-DFEPU)algorithm to improve log-likelihood ratio(LLR)quality with error propagation.We introduce an e...We propose a multi-tap look-up-table(LUT)-based error-tracking decision feedback equalizer with partial unrolling(ET-DFEPU)algorithm to improve log-likelihood ratio(LLR)quality with error propagation.We introduce an error-tracking model to obtain the probabilities of different error states,which are input into the decoder to obtain more accurate LLRs.We also use LUTs to reduce the computation complexity of ET-DFE-PU.Moreover,we adopt a low-complexity partially unrolled architecture to relax the feedback timing constraint.We conduct experiments to transmit 170-Gb/s 4-ary pulse amplitude modulation signal in intensity modulation and direct-detection system at C-band.The results show that the proposed method can achieve 3-d B receiver sensitivity improvement at the same post-forward error correction bit error ratio compared with the conventional DFE.展开更多
This paper presents a lOGb/s highspeed equalizer as the frontend of a receiver for backplane communication. The equalizer combines an analog equalizer and a twotap decisionfeedback equal izer in a halfrate structure t...This paper presents a lOGb/s highspeed equalizer as the frontend of a receiver for backplane communication. The equalizer combines an analog equalizer and a twotap decisionfeedback equal izer in a halfrate structure to reduce the intersymbolinterference （ISI） of the communication chan nel. By employing inductive peaking technique for the highfrequency boost circuit, the bandwidth and the boost of the analog equalizer are improved. The decisionfeedback equalizer optimizes the size of the CMLbased circuit such as D flipflops （DFF） and multiplex （MUX）, shortening the feedback path delay and speeding up the operation considerably. Designed in the 0. 181μm CMOS technology, the equalizer delivers 10Gb/s data over 18in FR4 trace with 28dB loss while drawing 27mW from a 1.8V supply. The overall chip area including pads is 0. 6 -0.7mm2.展开更多
In recent times, there has been growing interests in integration of voice, data and video traffic in wireless communication networks. With these growing interests, WCDMA has immerged as an attractive access technique....In recent times, there has been growing interests in integration of voice, data and video traffic in wireless communication networks. With these growing interests, WCDMA has immerged as an attractive access technique. The performance of WCDMA system is deteriorated in presence of multipath fading environment. The paper presents space-time coded minimum mean square error (MMSE) Decision Feedback Equalizer (DFE) for wideband code division multiple access (WCDMA) in a frequency selective channel. The filter coefficients in MMSE DFE are optimized to suppress noise, intersymbol interference (ISI), and multiple access interference (MAI) with reasonable system complexity. For the above structure, we have presented the estimation of BER for a MMSE DFE using computer simulation experiments. The simulation includes the effects of additive white Gaussian noise, multipath fading and multiple access interference (MAI). Furthermore, the performance is compared with standard linear equalizer (LE) and RAKE receiver. Numerical and simulation results show that the MMSE DFE exhibits significant performance improvement over the standard linear equalizer (LE) and RAKE receiver.展开更多
研究了水声图像高速传输信号处理方法,它包括两个方面,一方面是水声相干通信信号处理方法,其中:(1)多普勒频移补偿,在数据包的前后两端插入已知线性调频(Chirp)信号,拷贝相关后求互相关,估计相对多普勒平均频移。在自适应判决反馈均衡...研究了水声图像高速传输信号处理方法,它包括两个方面,一方面是水声相干通信信号处理方法,其中:(1)多普勒频移补偿,在数据包的前后两端插入已知线性调频(Chirp)信号,拷贝相关后求互相关,估计相对多普勒平均频移。在自适应判决反馈均衡器中加上自适应相位补偿器,采用快速自优化最小均方(LMS)算法,与其对应的速度容限优于常用的二阶锁相环相位补偿器的。两种补偿方法联合工作时,性能优良。(2)带有分集合并器的自适应判决反馈均衡器的算法是快速自优化的LMS算法,计算量小,性能优良。(3)自适应判决反馈均衡器与Turbo-网格编码调制(TCM)译码器级连、迭代算法。研究了基于软输出维特比(SOVA)方法的新型的比特-符号转换器,用它时误比特率(BER)比常规编码、映射方法的近似小2个数量级。另一方面是抗误码的图像压缩方法。本文基于数字小波变换和定长编码方法,研究了声图像的压缩。它包括:(1)选用CDF9/7小波进行小波变换。(2)对小波系数子带能量进行统计分析,三层小波分解是合适的。(3)对不同能量的子带采用不同的量化步长。(4)采用定长编码算法。结果表明声图像压缩比特率为0.85。当BER小于10^(-3)时,图像质量完好。当BER小于10^(-2)时,图像中出现少量小黑白点。在上述基础上研制了水声通信机,频带为(7.5～12.5)kHz,接收声呐阵为8基元等距线阵,信号为QPSK和8PSK。在中国千岛湖进行了湖试,采用SOVA硬迭代算法,达到了低BER。传输一幅256×256×8的声图需时约7s。传输距离与传输速率之积为55 km kbps。展开更多
文摘MIMO-DFE(Multiple-Input-Multiple-Output Decision Feedback Equalizer) based receiver architectures are researched recently to detect signals in BLAST(Bell laboratories LAyered Space-Time) over frequency-selective channels. Due to their recursive structure, these receivers may suffer from error propagation which results in an overall mean square error degradation. An MIMO-DFE based BLAST receiver with limited error propagation to combat frequencyselective channel is proposed, which employs both norm constraint on feedback filter taps and soft decision device. Simulation results show that the proposed receiver outperforms conventional ones in various frequency selective channels.
基金Supported by the National Natural Science Foundation of China(No.61471119)
文摘This paper evaluates the effect of decision feedback equalizer( DFE) error propagation for400 Gb/s Ethernet( 400 GbE) electrical link in order to propose some effective methods to improve bit error rate( BER). First,an analytical model for DFE burst error length distribution is proposed and simulated based on a NRZ electrical link in which a 5-tap DFE combined with a multiple-tap feed forward equalizer( FFE) is included. Then,a detailed derivation for BER considering DFE error propagation is given based on the distribution of burst error run length and the BER performance with and without forward error correction( FEC) is simulated too. After that,this paper investigates several MUX-based FEC interleaving methods including their complexity and latency in order to improve BER further. At last,three FEC interleaving schemes are compared not only in interleaving gain,but also in hardware complexities and latencies. Simulation results show that pre-interleave bit muxing can obtain good tradeoff between BER and complexity for 400 Gb E electrical link.
基金This work was supported by the National Natural Science Foundation of China(NSFC)(Nos.62301128,61871082,and 62111530150)the Open Fund of IPOC(BUPT)(No.IPOC2020A011)+1 种基金the STCSM(No.SKLSFO2021-01)the Fundamental Research Funds for the Central Universities(Nos.ZYGX2020ZB043 and ZYGX2019J008).
文摘We propose a trellis-compressed maximum likelihood sequence estimation(TC-MLSE)-assisted sliding-block decision feedback equalizer(DFE)to suppress the error propagation resulting from the DFE in high-speed systems.We use an out-ofrange detector to detect the end of burst errors from the DFE and activate the optional TC-MLSE to correct burst errors.We conduct experiments to transmit a 201-Gbit/s PAM-8 signal.The results show that the proposed method achieves a bit error rate of 3.65×10^(-3),which is close to that of MLSE.The optional MLSE is only activated when needed and processes 11.4%of the total symbols.Moreover,the proposed method compresses the maximum length of burst errors from 19 to 5.
基金Supported by the High Technology Research and Development Programme of China (No. 2003AA31g030).
文摘A 6.25 Gbps SerDes core used in the high signed based on the OIF-CEI-02.0 standard. To speed backplane communication receiver has been decounteract the serious Inter-Syrmbol-Interference （ISI）, the core employed a half-rate four-tap decision feedback equalizer （DFE）. The equalizer used the Signsign least mean-squared （SS-LMS） algorithm to realize the coefficient adaptation. An automatic gain control （AGC） amplifier with the sign least mean-squared （S-LMS） algorithm has been used to compensate the transmission media loss. To recover the clock signal from the input data serial and provide for the DFE and AGC, a bang-bang clock recovery （BB-CR） is adopted. A third order phase loop loek （PLL） model was proposed to predict characteristics of the BB-CR. The core has been verified by behavioral modeling in MATLAB. The results indicate that the core can meet the specifications of the backplane receiver. The DFE recovered data over a 34＂ FR-4 backplane has a peak-to-peak jitter of 17 ps, a horizontal eye opening of 0.87 UI, and a vertical eye opening of 500 mVpp.
基金supported by the National Natural Science Foundation of China(Nos.62301128 and U22A2086)the STCSM(No.SKLSFO2021-01)+1 种基金the Open Fund of IPOC(BUPT)(No.IPOC2020A011)the Fundamental Research Funds for the Central Universities(Nos.ZYGX2020ZB043 and ZYGX2019J008)。
文摘We propose a multi-tap look-up-table(LUT)-based error-tracking decision feedback equalizer with partial unrolling(ET-DFEPU)algorithm to improve log-likelihood ratio(LLR)quality with error propagation.We introduce an error-tracking model to obtain the probabilities of different error states,which are input into the decoder to obtain more accurate LLRs.We also use LUTs to reduce the computation complexity of ET-DFE-PU.Moreover,we adopt a low-complexity partially unrolled architecture to relax the feedback timing constraint.We conduct experiments to transmit 170-Gb/s 4-ary pulse amplitude modulation signal in intensity modulation and direct-detection system at C-band.The results show that the proposed method can achieve 3-d B receiver sensitivity improvement at the same post-forward error correction bit error ratio compared with the conventional DFE.
基金Supported by the National High Technology Research and Development Programme of China(No.2011AA10305)
文摘This paper presents a lOGb/s highspeed equalizer as the frontend of a receiver for backplane communication. The equalizer combines an analog equalizer and a twotap decisionfeedback equal izer in a halfrate structure to reduce the intersymbolinterference （ISI） of the communication chan nel. By employing inductive peaking technique for the highfrequency boost circuit, the bandwidth and the boost of the analog equalizer are improved. The decisionfeedback equalizer optimizes the size of the CMLbased circuit such as D flipflops （DFF） and multiplex （MUX）, shortening the feedback path delay and speeding up the operation considerably. Designed in the 0. 181μm CMOS technology, the equalizer delivers 10Gb/s data over 18in FR4 trace with 28dB loss while drawing 27mW from a 1.8V supply. The overall chip area including pads is 0. 6 -0.7mm2.
文摘In recent times, there has been growing interests in integration of voice, data and video traffic in wireless communication networks. With these growing interests, WCDMA has immerged as an attractive access technique. The performance of WCDMA system is deteriorated in presence of multipath fading environment. The paper presents space-time coded minimum mean square error (MMSE) Decision Feedback Equalizer (DFE) for wideband code division multiple access (WCDMA) in a frequency selective channel. The filter coefficients in MMSE DFE are optimized to suppress noise, intersymbol interference (ISI), and multiple access interference (MAI) with reasonable system complexity. For the above structure, we have presented the estimation of BER for a MMSE DFE using computer simulation experiments. The simulation includes the effects of additive white Gaussian noise, multipath fading and multiple access interference (MAI). Furthermore, the performance is compared with standard linear equalizer (LE) and RAKE receiver. Numerical and simulation results show that the MMSE DFE exhibits significant performance improvement over the standard linear equalizer (LE) and RAKE receiver.
文摘研究了水声图像高速传输信号处理方法,它包括两个方面,一方面是水声相干通信信号处理方法,其中:(1)多普勒频移补偿,在数据包的前后两端插入已知线性调频(Chirp)信号,拷贝相关后求互相关,估计相对多普勒平均频移。在自适应判决反馈均衡器中加上自适应相位补偿器,采用快速自优化最小均方(LMS)算法,与其对应的速度容限优于常用的二阶锁相环相位补偿器的。两种补偿方法联合工作时,性能优良。(2)带有分集合并器的自适应判决反馈均衡器的算法是快速自优化的LMS算法,计算量小,性能优良。(3)自适应判决反馈均衡器与Turbo-网格编码调制(TCM)译码器级连、迭代算法。研究了基于软输出维特比(SOVA)方法的新型的比特-符号转换器,用它时误比特率(BER)比常规编码、映射方法的近似小2个数量级。另一方面是抗误码的图像压缩方法。本文基于数字小波变换和定长编码方法,研究了声图像的压缩。它包括:(1)选用CDF9/7小波进行小波变换。(2)对小波系数子带能量进行统计分析,三层小波分解是合适的。(3)对不同能量的子带采用不同的量化步长。(4)采用定长编码算法。结果表明声图像压缩比特率为0.85。当BER小于10^(-3)时,图像质量完好。当BER小于10^(-2)时,图像中出现少量小黑白点。在上述基础上研制了水声通信机,频带为(7.5～12.5)kHz,接收声呐阵为8基元等距线阵,信号为QPSK和8PSK。在中国千岛湖进行了湖试,采用SOVA硬迭代算法,达到了低BER。传输一幅256×256×8的声图需时约7s。传输距离与传输速率之积为55 km kbps。
