In this paper we propose two iterative algorithms of joint channel estimation and symbol detection for Orthogonal Frequency Division Multiplexing (OFDM) systems. In which, superimposed pilot scheme is adopted and an i...In this paper we propose two iterative algorithms of joint channel estimation and symbol detection for Orthogonal Frequency Division Multiplexing (OFDM) systems. In which, superimposed pilot scheme is adopted and an initial Channel State Information (CSI) is obtained by employing a first-order statistic. In each subsequent iteration, we propose two algorithms to update the CSI. The Mean Square Error (MSE) of channel estimation and Bit Error Rate (BER) performance are given and simulation results demonstrate that the iterative algorithm using method B has good perform-ance approaching the ideal condition.展开更多
Digital low-density parity-check(LDPC) decoders can hardly meet the power-limits brought by the new application scenarios. The analog LDPC decoder, which is an application of the analog computation technology, is cons...Digital low-density parity-check(LDPC) decoders can hardly meet the power-limits brought by the new application scenarios. The analog LDPC decoder, which is an application of the analog computation technology, is considered to have the potential to address this issue to some extent. However, due to the lack of automation tools and analog stopping criteria, the analog LDPC decoders suffer from costly handcraft design and additional decoding delay, and are not feasible to practical applications. To address these issues, a decoder architecture using reusable building blocks is designed to lower the handcraft design, and a probability stopping criterion that is specially designed for analog decoder is further planned and implemented to reduce the decoding delay. Then, a(480,240) CMOS analog LDPC decoder is designed and fabricated in a 0.35-μm CMOS technology. Experimental results show that the decoder prototype can achieve 50 Mbps throughput when the power consumption is about 86.3m W, and the decoding delay can be reduced by at most 93% compared with using the preset maximum decoding delay in existing works.展开更多
A non-unitary non-coherent space-time code which is capable of achieving full algebraic diversity is proposed based on full diversity space-time block coding, The error performance is optimized by transforming the non...A non-unitary non-coherent space-time code which is capable of achieving full algebraic diversity is proposed based on full diversity space-time block coding, The error performance is optimized by transforming the non-unitary space-time code into unitary space-time code, By exploiting the desired structure of the proposed code, a grouped generalized likelihood ratio test decoding algorithm is presented to overcome the high complexity of the optimal algorithm, Simulation results show that the proposed code possesses high spectrum efficiency in contrast to the unitary space-time code despite slight loss in the SNR, and besides, the proposed grouped decoding algorithm provides good tradeoff between performance and complexity,展开更多
基金Supported by National "863" Project (No.2002AA123031).
文摘In this paper we propose two iterative algorithms of joint channel estimation and symbol detection for Orthogonal Frequency Division Multiplexing (OFDM) systems. In which, superimposed pilot scheme is adopted and an initial Channel State Information (CSI) is obtained by employing a first-order statistic. In each subsequent iteration, we propose two algorithms to update the CSI. The Mean Square Error (MSE) of channel estimation and Bit Error Rate (BER) performance are given and simulation results demonstrate that the iterative algorithm using method B has good perform-ance approaching the ideal condition.
基金supported in part by the National Natural Science Foundation of China(No.61601027)the Opening Fund of the Space Objective Measure Key Laboratory(No.2016011)
文摘Digital low-density parity-check(LDPC) decoders can hardly meet the power-limits brought by the new application scenarios. The analog LDPC decoder, which is an application of the analog computation technology, is considered to have the potential to address this issue to some extent. However, due to the lack of automation tools and analog stopping criteria, the analog LDPC decoders suffer from costly handcraft design and additional decoding delay, and are not feasible to practical applications. To address these issues, a decoder architecture using reusable building blocks is designed to lower the handcraft design, and a probability stopping criterion that is specially designed for analog decoder is further planned and implemented to reduce the decoding delay. Then, a(480,240) CMOS analog LDPC decoder is designed and fabricated in a 0.35-μm CMOS technology. Experimental results show that the decoder prototype can achieve 50 Mbps throughput when the power consumption is about 86.3m W, and the decoding delay can be reduced by at most 93% compared with using the preset maximum decoding delay in existing works.
基金Supported by the National Natural Science Foundation of China (Grant No. 60372055)the National Doctoral Foundation of China (Grant No. 20030698027)
文摘A non-unitary non-coherent space-time code which is capable of achieving full algebraic diversity is proposed based on full diversity space-time block coding, The error performance is optimized by transforming the non-unitary space-time code into unitary space-time code, By exploiting the desired structure of the proposed code, a grouped generalized likelihood ratio test decoding algorithm is presented to overcome the high complexity of the optimal algorithm, Simulation results show that the proposed code possesses high spectrum efficiency in contrast to the unitary space-time code despite slight loss in the SNR, and besides, the proposed grouped decoding algorithm provides good tradeoff between performance and complexity,
